In the case of integrated dynamic memories in the form of DRAMs, in operating times in which memory cells are not accessed externally, a so-called refresh mode is necessary in order to refresh the memory cell content, which may volatilize for example due to leakage currents of the storage capacitor or selection transistor, and thus to permanently retain it. In the refresh mode, the assessed and amplified data signals from selected memory cells are written directly back to the relevant memory cells. This is generally controlled by a refresh control circuit, which additionally defines a refresh frequency with which the memory cell content is respectively refreshed.
For DRAM memory modules, in particular, users are generally demanding ever higher operating temperatures. In this case, however, it must be taken into account that the data retention time of the memory cells decreases as the operating temperature increases, since the leakage currents of the storage capacitor and/or of the respective selection transistor that occur in the memory cells increase as operating temperatures rise. In this case, the refresh frequency can be chosen to be smaller, the greater the maximum achievable data retention time of a memory cell and thus the possible time duration between two refresh cycles for the memory cell. By virtue of the described temperature behavior of the data retention time, generally a common maximum operating temperature, and thus a defined refresh frequency, has hitherto been specified for all DRAM memory modules of one type, so that this avoids excessively great restrictions in the memory access on account of pauses in the memory access that are indicated by the refresh mode.
What is disadvantageous about the previously known types of refresh modes for refreshing memory cells of a dynamic memory is that generally it is not possible to ascertain whether specific memory cells require a refresh of their memory cell content. In this case, it is of importance, in particular, that during active operation of the memory, in which memory cells are selected for example for the read-out of data signals, these memory cells are accessed anyway, the data signals read out from selected memory cells being assessed and amplified in a sense amplifier of the memory cell array. As a result, a refresh of the content of the memory cells already takes place during the customary read and write operations of the dynamic memory. In this case, it is unnecessary, for example, to refresh a memory cell that has been addressed shortly beforehand with a read or write operation in a separate refresh mode if the data retention time of this memory cell is still far from having elapsed. In this connection, it is of importance, particularly in the application of dynamic memories in mobile systems, that the current consumption of the memory rises due to frequent refresh operations, in particular caused by the assessment and amplification operation of the respective sense amplifier during the refreshing of the memory cell content.